| Development area |
Significance |
Example |
| Internal clock frequency |
speed of data processing inside the
CPU. |
800 MHz |
| External clock frequency |
Speed of data transfer to and from the CPU
via the system bus (or Front Side Bus). |
133 MHz |
| Clock doubling |
That the CPU works x times faster internally
than externally. |
6.0 times (like above) |
| Internal data width |
How many data bits can the CPU process simultaneously. |
32 bits |
| External data width |
How many data bits can the CPU receive simultaneously
for processing |
64 bits |
| Internal cache (Level 1 cache) |
Large and better L1 cache, which is a small
fast RAM. It works as a buffer between CPU and regular RAM. |
64 KB |
| External cache (Level 2 cache) |
Larger and better implementet L2 cache, place on-die in same chip as CPU. |
256 or 512 KB |
| Instruction set |
Can the instruction set be simplified,
to speed up program processing? Or can it be improved? |
RISC code
|